D.Poornima Devi
PG Scholar, Department of Electronics and Communication(VLSI), SriVidya college of Engineering and technology, Virudhunagar, Tamilnadu, India.
PG Scholar, Department of Electronics and Communication(VLSI), SriVidya college of Engineering and technology, Virudhunagar, Tamilnadu, India.
The aim is to generate the address generation
circuitry of Deinterleaver used in the WiMAX transreceiver using the Xilinx
Field Programmable Gate Array (FPGA). The floor function associated with the
implementation of FPGA is very difficult in IEEE 802.16e standard. So we eliminate
the requirement of floor function by using a simple mathematical algorithm.
Some modulations like QPSK, 16-QAM and 64-QAM along with its code rates make
our approach to be novel and high efficient. By using the majority logic
circuit and biorthogonal decoding it can be used to reduce power consumption
and latency compared to the previous paper. Power consumption can be reduced up
to 34mw and latency can be reduced up to 1.206ns.
